Voltage multiplier circuit
AssigneeFairchild Camera and Instrument Corporation
InventorsR. Kenneth Hose, Jr., Keith Riordan, Stephen M. Martin
Life of this patent
Estimating the term…
Abstract
A new and improved voltage multiplier circuit is provided which converts a relatively low voltage to a relatively high voltage without any undesirable voltage drops across any of the constituent components. A plurality of the disclosed voltage multiplier circuits may be cascaded together to increase the multiplied output voltage, wherein each multiplier stage of the cascaded circuits multiplies the input voltage by two.
Claims18
A voltage multiplier circuit comprising:
- a source of a reference clock signal;
- a voltage source;
- a pair of cascaded inverters forming a first voltage level shift means, a first of said pair of inverters being coupled between said voltage source and ground potential, and having an input thereof coupled to said reference clock signal and an output coupled to an input of the second of said pair of cascaded inverters, said second inverter being coupled between said reference clock signal and an output of the voltage multiplier circuit;
- charge storage means coupled in parallel with said second inverter;
- and,
- switching means coupled between said output of the multiplier circuit and said voltage source, and having a switching input coupled to an output of said second inverter.
A voltage multiplier circuit comprising:
- a source of a pair of reference clock signals;
- a voltage source;
- a pair of cascaded inverters forming a first voltage level shift means, a first of said pair of inverters being coupled between said voltage source and ground potential, and having an input thereof coupled to a first of said reference clock signals and an output coupled to an input of the second of said pair of cascaded inverters, said second inverter being coupled between said first reference clock signal and an output of said first voltage level shift means;
- first charge storage means coupled in parallel with said second inverter;
- first switching means coupled between said output of said first voltage level shift means and said voltage source, and having a switching input coupled to an output of said second inverter;
- second voltage level shift means having a first input coupled to a second of said referenced clock signals, a second input coupled to said output of said first voltage level shift means, and an output;
- third voltage level shift means having a first input coupled to said output of said second voltage level shift means, a second input coupled to said output of said first voltage level shift means;
- second charge storage means coupled between said output of said second voltage level shift means and an output terminal of said multiplier circuit;
- and,
- second switching means coupled between said output terminal of said multiplier circuit and said second input of said third voltage level shift means, and having a switching input coupled to an output of said third voltage level shift means.
A voltage multiplier circuit as in claim 24 further characterized by said second switching means comprising a field-effect transistor.
Dependencies are inferred from the claim text.