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US 4,053,792 AGranted
Low power complementary field effect transistor (CFET) logic circuit
AssigneeInternational Business Machines Corporation
InventorsAnthony T. Cannistra, Joseph A. Petrosky, Jr.
Life of this patent
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Abstract
Disclosed is a logic circuit implemented in complementary field effect transistor (CFET) technology for improving the transient response of CFET circuits and providing a true DOT-OR or DOT-AND logic function. The pull-up circuit includes at least one active device and is placed either in parallel with or replaces the conventional load impedance between a source of potential and the output node.
Claims4
A complementary field effect transistor logic circuit comprising:
- an output node;
- a first plurality of transistors of a first channel type connected in parallel between a first potential level and said output node, each said transistor receiving an input signal at a control electrode;
- a pull-up transistor of a second channel type connected between said output node and a second potential level;
- impedance means connected between said second potential level and a control electrode of said pull-up transistor;
- and
- a second plurality of transistors of said second channel type connected in electrical series between said first potential level and the control electrode of said pull-up transistor, each said second plurality of transistors having a control electrode receiving an input corresponding to each of the inputs received by said first plurality of transistors.
3 more elements
A complementary field effect transistor logic circuit comprising:
- an output node;
- a first plurality of transistors of a first channel type connected in parallel between a first potential level and said output node, a control electrode of each said first plurality of transistors receiving an input signal;
- a pull-up transistor of a second channel type connected between said output node and said second potential level;
- a second plurality of field effect transistors of said second channel type connected between said first potential level and a control electrode of said pull-up transistor, each said second plurality of transistors receiving an input signal at its control electrode corresponding to an input signal received by each said plurality of transistors of said first channel type;
- and
- a third plurality of transistors of said second channel type connected between said second potential level and a current path defined by said second plurality of transistors, each said third plurality of transistors receiving at its control electrode a complemented input signal corresponding to an input signal received at the control electrode of each said first and second plurality of transistors.
3 more elements
Dependencies are inferred from the claim text.