Circuit arrangement for antilocking control system

For use in an antilocking control system for the wheel brakes of a vehicle wherein signals dependent on the rotational behavior of the wheels of the vehicle are evaluated to produce control signals, including slip signals, for controlling control members associated with the wheel brakes of the vehicle to vary the brake pressure, a circuit arrangement for providing a reference value for generating the slip signals comprising in combination:

• a memory for storing said reference value;
• first and second signal inputs for receiving respective first and second input signals whose values are dependent on the respective rotational speeds of two different wheels of the vehicle;
• selector circuit means, connected to said first and second signal inputs, for feeding the one of said first and second input signals with the greater value to said memory to cause said memory to store said greater value;
• comparison circuit means, connected to said first and second inputs and to said memory, for comparing the values of said first and second signals with the value of the reference signal stored in said memory and for emitting respective output signals whenever the value of either of said first and second signals exceeds or falls below the value of the reference signal stored in said memory;
• third and fourth signal inputs for receiving respective signals indicating that the control members associated with the wheels from which said first and second signals are derived have responded;
• and
• logic circuit means, responsive to the output signals from said comparison circuit means and to signals at said third and fourth signal inputs, for controlling said memory to cause said reference value stored in said memory to be selectively varied according to either a first negative time constant for rapidly decreasing the value in said memory whereby a very rapid matching of a higher reference value to the rotational speed of the wheel will be effected, a second negative time constant for very slowly reducing the value in said memory whereby a very slow reduction in the reference value corresponding to a decrease in the speed of the vehicle on ground having a small coefficient of friction will be effected, or a third positive time constant for relatively rapidly increasing the value in said memory whereby a relatively rapid matching of the reference value with a greater rotational speed of a wheel will be provided;
• said logic circuit means including switching means for causing said reference value stored in said memory to be varied according to
• a. said first time constant when said comparison circuit means produces output signals indicating that the value of both of said first and second signals is less than said reference value;
• b. said second time constant when said comparison circuit means produces output signals indicating that the value of both of said first and second signals is less than said reference value and signals are present at said third and fourth signal inputs indicating that both control members have responded;
• and
• c. said third time constant when said comparison circuit means produces output signals indicating that the value of at least one of said first and second signals is greater than said reference value.