Electronic timepiece

#This invention is directd to an electronic timepiece, and in particular to a quartz crystal electronic timepiece wherein the division ratio of the divider circuit is automatically regulated in response to an external reference signal.

#In prior art quartz crystal electronic timepieces, adjustment of the oscillating frequency was effected by tuning the quartz crystal oscillator circuit to regulate the accuracy of the timekeeping signals produced by the divider circuit. Such tuning was usually accomplished by changing or varying the capacitance of a trimmer capacitor in the oscillator circuit. Nevertheless, it was found that such trimmer capacitors were less then completely satisfactory because of the movable parts thereof. Moreover, because the small size of an electronic wristwatch requires the components of the timekeeping circuit to be of a miniature size, the range of capacitance was of necessity, limited, thereby considerably limiting the range over which the oscillating circuit could be tuned. Additionally, the mechanical movement required to adjust the capacitor and hence tune the oscillator circuit could not be done without experiencing considerable difficulty.

#The popularity of quartz crystal electronic wristwatches, has rendered the use of inexpensive quartz crystal vibrators particularly desirable, in view of the savings provided thereby, as well as the stable operation which same affords. Accordingly, division ratio regulation circuits have been developed to regulate the division ratio of the divider circuit to produce an accurate timekeeping signal in response to an advanced or retarded high frequency timekeeping signal produced by a quartz crystal oscillator circuit. However, in the division ratio regulating circuits heretofore proposed, the number of input terminals required to establish a division ratio regulating quantity have increased, thereby increasing the size of the electronic wristwatch including same. Additionally, although such multi-terminal division ratio regulating circuits have lowered the cost of such electronic wristwatches utilizing same, the complicated nature of the circuitry utilized to provide the necessary regulation proved to be less than completely satisfactory.

#For a fuller understanding of the invention, reference is had to the following description taken in connection with the accompanying drawings, in which:

#FIG. 1 is a block circuit diagram of a division ratio regulating circuit adapted to be adjusted in response to an externally applied reference signal constructed in accordance with the instant invention;

#FIG. 2 is a block circuit diagram of a generator for producing a reference signal in accordance with the preferred embodiment of the instant invention;

#Reference is now made to FIG. 1 wherein an automatic division ratio regulating circuit for an electronic timepiece is depicted. An oscillator circuit 1, preferably utilizing a quartz crystal vibrator as a time standard, is adapted to apply a high frequency time standard signal to a divider circuit 2 comprised of a plurality of series-connected master-slave flip-flop binary divider stages. A display 3 is adapted to display time counted by the divider circuit 2 in response to the timekeeping signals produced thereby.

#A frequency comparator 4 is also adapted to receive the high frequency standard signal produced by oscillator circuit 1. A manually operated two position regulating switch 9 is coupled to a control circuit 8 and in response to closing switch 9, a receiver 7 receives a reference signal from an external source, and applies same to the frequency comparator 4. The frequency comparator 4 compares the high frequency time standard signal to the reference signal and produces frequency difference signals representative of the frequency therebetween. A memory 5 is adapted to store the frequency difference signals produced by the frequency comparator 4 and in response to a control signal from control circuit 8, apply the stored difference signal to a regulating circuit 6 adapted to regulate the division ratio of the divider circuit in response to the application thereto of the difference signal and a signal from one or more of the low frequency divider stages of divider circuit 2.

#Specifically, when switch 9 is closed, a reset signal a is applied to the frequency comparator 4 to reset same. Immediately thereafter, a reference signal having a period such as 1 or 2 seconds is applied to receiver 7 and at the termination thereof, a reference signal b is applied to the frequency comparator 4 coincident with the application of a memory store signal c to memory 5 to effect storing of the frequency difference signals in the memory 5, thereby completing the determination of the amount by which the division ratio is to be regulated by regulating circuit 6. Thereafter, switch 9 is opened in order to avoid any noise from affecting the frequency difference signals stored in the memory. Accordingly, regulation of the division ratio is automatically achieved in response to an external reference signal produced by the actuation of a single switch.