US 4,051,530 AGranted

Frame-to-frame coding system

AssigneeNippon Telegraph & Telephone Public Corporation

InventorsHideo Kuroda, Fumio Kanaya

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Abstract

An input video signal is fed to a substracter wherein a difference is taken between the input and the output from a frame memory to provide a difference signal, the magnitude of which is controlled by a magnitude adjuster. The controlled output is then fed to a threshold circuit, from which a significant difference signal is derived which has a magnitude above a given level. The significant difference signal is quantized by an encoder into a code having a reduced number of bits as compared with the inputted significant difference signal. The quantized code is written into a buffer memory, and is read out therefrom at a uniform bit rate to a transmission line. A sum of a signal indicative of the representative level of the quantized code from the encoder and the output of the frame memory is formed in an adder, and the sum signal is written into the frame memory and read out subsequently or after one frame. The occupancy of the buffer memory is detected to provide a control over the magnitude adjuster in accordance with the detected value so as to prevent an overflow from the buffer memory. A signal to refresh the frame memory located on the receiving side is transmitted by writing the output of the adder into the buffer memory after switching from the output of the encoder to the output of the adder.

Claims10

Dependent claims

An interframe coding system comprising:

a subtracter for outputting a difference signal between an input signal and an output from a frame memory;
a magnitude adjuster connected with the output of the subtracter for controlling the magnitude of the difference signal;
an encoder connected with the output of the magnitude adjuster for quantizing the output therefrom to output a code having a smaller number of bits than that of the difference signal, and including means for converting the code into a representative level output signal having the same number of bits as that of the difference signal and indicative of a quantization level;
an adder connected with the output of the encoder for adding together the representative level output signal and the output from the frame memory;
the frame memory being connected with the output of the adder for delaying its output by one frame of the input signal;
a combination of a synchronizing signal generator and an address generator for deriving from the input signal a synchronizing signal and an address signal for defining the position of the output code of the encoder on the frame;
a buffer memory connected with the output of the encoder for receiving the code output therefrom and the outputs from the synchronizing signal generator and the address generator, which are written into the buffer memory and read out therefrom as code signals of a uniform bit rate;
and
a controller for monitoring the occupancy of the buffer memory to thereby control the magnitude adjuster in accordance with the occupancy so as to prevent an overflow of the buffer memory.

6 more elements

Dependencies are inferred from the claim text.