Edit circuit for a numerical control system

An edit circuit for a numerical control system for a plurality of objects being controlled, which objects have one common control axis, characterized in that said circuit comprises a plurality of input means receiving input data corresponding to said objects, respectively, a plurality of A-registers storing the data from the input means, a comparator circuit comparing the data stored in the A-registers, a plurality of arithmetic circuits operating on the data in the A-registers based on the result of comparison at the comparator circuit, and a B-register combining the operated data from the arithmetic circuits into one series of data for storage therein, said input means receiving input data in response to input timing signals from the corresponding A-registers, said input timing signals being generated when each A-register becomes empty, said data delivered to each of said A-registers being compared at said comparator circuit so as to find a datum having the shortest control time t.sub.1 relating to said common control axis among the data being compared at one time, each of said arithmetic circuits dividing the data in the corresponding A-register into partial data to be controlled in the control time t.sub.1 and another partial datum consisting of the remainder thereof based on the outcome from the comparison, said B-register storing those partial data from said arithmetic circuits which have the control time t.sub.1 as one datum, said other partial data being returned to the corresponding A-registers, respectively, said objects being controlled simultaneously by said one datum stored in said B-register.