US 4,048,649 AGranted

Superintegrated V-groove isolated bipolar and VMOS transistors

AssigneeTransitron Electronic Corporation

InventorRichard Bohn

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Abstract

The invention concerns a semiconductor structure having a compatible mixture of bipolar and unipolar transistors. In that structure a monocrystalline p-type silicon substrate is employed which has its 1-0-0 crystallographic planes at a face on which an n epitaxial layer was grown. The epitaxial layer is divided into electrically isolated parts by V-grooves that extend down through the epitaxial layer and have their apices terminating in the substrate. A thin silicon dioxide film coats the V-grooves and those grooves are filled with polycrystallie silicon. Where it is desired to use the polycrystalline silicon as the insulated gate of a field effect transistor, the polycrystalline silicon is electrically conductive. Bases for bipolar transistors are formed by diffusion of an appropriate impurity into selected areas of the epitaxial layer. The emitters, drains, and sources are formed by diffusion of a different impurity. Each field effect transistor has its drain and source on adjacent parts of the epitaxial layer which are separated by the V-groove in which the gate is situated. The base and emitter of a bipolar transistor may be situated on one isolated part and the collector may be situated on an adjacent part separated by a V-groove having an electrically conductive polycrystalline filler.

Claims3

Dependent claims

A semiconductor structure comprising

a monocrystalline semiconductor substrate of one conductivity type, the substrate having its <100>
crystallographic planes at one face thereof,
an epitaxial layer of the opposite conductivity type overlying said one face of the substrate,
a V-groove extending through the epitaxial layer and having its apex in the substrate, the V-groove dividing the epitaxial layer into at least two isolated parts,
an electrically insulative thin film coating the surfaces of the V-groove,
electrically conductive polycrystalline semi-conductor material filling the V-groove,
a first diffusion region of said one conductivity type extending into the epitaxial layer,
a second diffusion region of said opposite conductivity type overlying a portion of said first region and forming a p-n junction therewith,
a third diffusion region of said opposite conductivity type extending into the epitaxial layer, said third region being disposed on a part of said epitaxial layer that is isolated by the V-groove from the part of the epitaxial layer on which said first and second regions are situated,
means on the surface of the semiconductor structure providing electrical connections to each of said diffusion regions and to the polycrystalline material in the V-groove, and
means for biasing the polycrystalline semiconductor material in the V-groove in a polarity which induces a conductive channel under the V-groove that enables the flow of electric current between isolated parts of the epitaxial layer.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 05/655,638Filed 6 Feb 1976
Granted: 13 Sep 1977
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10D 64/513
Disposition of the gate electrodes, e.g. buried gates: within recesses in the substrate, e.g. trench gates, groove gates or buried gates
H10D 30/60
Field-effect transistors [FET]: insulated-gate field-effect transistors [IGFET]
H10D 30/658
Lateral dmos [ldmos] fets: having trench gate electrodes
H10D 62/113
Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies: isolations within a…