Calculator system having multi-function memory instruction register

Abstract

A calculator system, implemented on at least one semiconductor chip and having a read-only-memory for storing a plurality of program instructions, has a multi-function memory instruction register. The instruction register has a parallel input for receiving a selected program instruction from the memory, and preferably a parallel output for transmitting the program instruction to a decoder. The instruction register also has a serial output connected to a buffer. The memory is addressed by an address register which also provides a code indicative of whether or not the addressed program instruction is to control the calculator system. When the addressed program instruction is to control the system, the code has preselected setting and the program instruction is read out of the instruction register through the buffer and is sequentially serially re-entered into the instruction register via a serial input. Thereafter, the program instruction is read out of the instruction register to be decoded by the decoder. In a multi-chip system, each of the plurality of chips has a read-only-memory for storing a plurality of program instructions, an aforementioned multi-function memory instruction register and associated buffer, and the serial inputs of the instruction registers of the plurality of chips are connected in common. One chip is selected by the preselected setting of the code and program instructions of the selected chip are read out to all of the instruction registers implemented on the plurality of chips via the common connection.

Dependencies are inferred from the claim text.