Phase locked loop synthesizer
AssigneeHitachi, Ltd.
InventorTakashi Ihara
Life of this patent
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AssigneeHitachi, Ltd.
InventorTakashi Ihara
Estimating the term…
A phase locked loop synthesizer comprising a means for controlling a tuning means, wherein a phase difference between the outputs of a reference signal oscillator and a programmable counter means is detected by a phase detector to obtain a d.c. voltage corresponding to the phase difference, an output having a prescribed frequency is generated by a voltage controlled oscillator frequency is controlled by said d.c. voltage, a part of said output and the output having a second reference frequency from a local oscillator are mixed by a mixer, the mixed output is supplied to a tuning means which is tuned to the mixed difference frequency, the output of said tuned means is supplied to said counter means to be frequency divided in a prescribed division ratio and sent to said phase detector, a part of digital input data for setting the frequency division ratio of said counter means is detected, and in accordance with the input data the tuning reactance of said tuning means is varied thereby to control the tuned frequency of said tuning means.
A PLL synthesizer comprising a reference signal oscillator;
A PLL synthesizer comprising a reference signal oscillator;
A PLL synthesizer comprising a reference signal oscillator;
In a PLL synthesizer comprising a voltage controlled oscillator for generating an output having a prescribed frequency in accordance with a value of an applied controlled voltage;
Dependencies are inferred from the claim text.