Process for the production of a multi-chip wiring arrangement
AssigneeSiemens Aktiengesellschaft
InventorsArtur Weitze, Michail Sapunarow
Life of this patent
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Abstract
A process for producing multi-chip wiring arrangements which consist of a ceramic carrier with through contact holes associated with thin film wiring on one side of the carrier and with multi layer, thick layer wiring on the other side of the carrier. The holes on the one side of the carrier are metallized and galvanically strengthened while the holes on the other side of the carrier are sealed by baking therein a thick layer of paste. Thereafter the multi layer, thick layer wiring and the thin film wiring are produced in that order.
Claims6
A method for producing a multi-chip wiring arrangement on a carrier comprising the steps of:
- forming through holes in the carrier,
- metallizing and galvanically strengthening the walls and edge zones of the holes on one side of the carrier,
- filling the holes on the other side of the carrier with a conductive paste,
- baking the conductive paste in the holes and thereby sealing the same,
- forming multi-thick layer wiring on the other side of the carrier and
- forming thin film wiring on said one side of the carrier.
Dependencies are inferred from the claim text.