I/O bus transceiver for a data processing system
AssigneeData General Corporation
InventorsNatalio Kerllenevich, Daniel Michael Clemson
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AssigneeData General Corporation
InventorsNatalio Kerllenevich, Daniel Michael Clemson
Estimating the term…
There is disclosed an input/output system, employed within a data processing system that includes a central processing unit (CPU). The CPU includes improved input/output shift register structure of interfacing structure for interfacing with I/O structure. The I/O structure includes improved CPU transceiver and peripheral device transceiver apparatus. The device transceiver interfaces with an improved device controller. In the preferred embodiment of the present invention, the CPU, CPU transceiver, device transceiver, and device controller, all being constructed primarily from MOS technology, are each contained within a respective chip. Further features of the input/output system include capability for placement of multiple transceiver/controllers and their respective peripheral devices at varying distances from the CPU by virtue of novel clock and data transmission means which maintains accurate processing of data regardless of propagation delay, distortion, data skewing, etc., due to varying transmission distances and inherent limitations of MOS, bipolar, and other technology.
In a data processing system including a CPU and at least one peripheral device controller, transceiver means including a CPU transceiver and at least one peripheral device controller transceiver for transmitting and receiving signals between said CPU and said peripheral device controller, said transceiver means comprising:
Dependencies are inferred from the claim text.