Semiconductor integrated circuit device including an array of insulated gate field effect transistors
AssigneeRCA Corporation
InventorAndrew Gordon Francis Dingwall
Life of this patent
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Abstract
A monolithic array of insulated gate field effect transistors useful, for example, as a read-only memory, has means for defining a pre-selected array of operative and non-operative transistors in a row and column arrangement. Non-operative transistors include diffused regions lying in the conductive channel zones thereof which serve to raise the value of the threshold voltage of these transistors above a value normally applied to the gate electrodes of all the transistors in the operation of the device. Operative transistors have no such threshold-raising diffused regions in their channel zones so that they can be turned on by the normally applied voltage. The array is programmable by means of a single photomask.
Claims6
A monolithic integrated semiconductor device formed in a body of semiconductive material, initially of one type conductivity and having a surface, comprising:
- a plurality of parallel, elongated regions of conductivity type opposite to that of said body in said body adjacent to said surface, said regions being arranged in pairs,
- a lesser plurality of regions of said opposite type conductivity, each member of said lesser plurality of regions being disposed between the regions of a separate pair of the first-mentioned regions of opposite type conductivity,
- insulating material on said surface over the spaces between said first-mentioned and second-mentioned regions of opposite type conductivity,
- a plurality of conductive strips on said insulating material and extending transversely of said elongated regions of opposite type conductivity whereby a plurality of MOS transistors are defined at a plurality of locations in said semiconductor device, said second-mentioned regions of opposite type conductivity comprising the drain regions of said transistors, said first-mentioned elongated regions comprising the source regions thereof and the spaces between said firstmentioned and said second-mentioned elongated regions of opposite type conductivity beneath said conductive strips comprising the conduction channel zones of said MOS transistors, and
- means in said body in selected ones of said conduction channel zones for increasing the threshold potential of said selected ones of said conduction channel zones relative to the threshold potentials of unselected ones of said conduction channel zones.
Dependencies are inferred from the claim text.