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US 4,038,563 AGranted
Symmetrical input NOR/NAND gate circuit
AssigneeMcDonnell Douglas Corporation
InventorsRainer Zuleeg, Johannes K. Notthoff
Life of this patent
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Abstract
An electrical circuit is shown having first and second pluralities of junction field effect transistors connected with an output transistor to provide NOR/NAND gate logic operation. The junction field effect transistors are preferably enhancement mode junction field effect transistors selected so that the circuit can be constructed as described on an integrated circuit chip.
Claims5
A nor/nand gate circuit comprising:
- a plurality of first normally-off type of junction field effect transistors, each of said first transistors including a drain, gate and source;
- a like plurality of second normally-off type of junction field effect transistors, each of said second transistors including a drain, gate and source;
- a like plurality of individual input terminals;
- a third normally-off type of junction field effect transistor, said third transistor including a drain, gate and source;
- a common impedance means connecting said drains of said first transistors and said gate of said third transistor to a first supply voltage, said drain of said third transistor being connected to a second supply voltage, said drains of said second transistors and said source of said third transistor being connected to a first output terminal, said sources of said first and second transistors being connected directly to a second output terminal;
- and
- means connecting said gates of said first transistors and said gates of said second transistors directly to each other by pairs and each such pair directly to a corresponding one of said input terminals in an arrangement of said first and said second transistors which is symmetrical relative to said second output terminal.
4 more elements
Dependencies are inferred from the claim text.