Digital attenuator

Abstract

A digital attenuator is disclosed which is capable of having the output PCM signal attenuated nearly in proportion to the input PCM signal level based upon simple logic operations of P.sub.out = .alpha. P.sub.in + N where P.sub.out = output PCM signal P.sub.in = input PCM signal processed by a compressor .alpha. = a real number satisfying the condition 0 < .alpha. < 1, and N = a real number larger than or equal to 0. When N = 0, in order to obtain P.sub.out = .alpha.P.sub.in, P.sub.in is shifted to the lower digit side by a predetermined number of bits by a single pattern shift circuit, or P.sub.in is branched to the plurality of pattern shift circuits and P.sub.in is shifted to the lower digit side by predetermined number of bits respectively, which are different and the outputs of the pattern shift circuits are added to each other by an adder. When N > 0, to obtain the sum .alpha.P.sub.in + N, the output signal .alpha.P.sub.in, which is obtained in the manner described above, is added to a specific pattern representing N which is generated by a specific pattern generating circuit. The above sum is compared with P.sub.in and when the former is larger than or equal to the latter, P.sub.in becomes P.sub.out, while when the former is less than the latter, the sum is derived as P.sub.out. Thus, an attenuation nearly proportional to the input PCM signal level may be attained.

Dependencies are inferred from the claim text.