Pilot signal extracting circuitry
AssigneeNippon Gakki Seizo Kabushiki Kaisha
InventorMinoru Ogita
Life of this patent
Estimating the term…
Loading patent…
AssigneeNippon Gakki Seizo Kabushiki Kaisha
InventorMinoru Ogita
Estimating the term…
A pilot signal extracting circuitry designed to extract, from a composite signal consisting of plural signals modulated by a suppressed carrier modulation system, a pilot signal for controlling the generation of a carrierwave which is used for the demodulation of the composite signal. The pilot signal extracting circuitry comprises: a circuit for generating a signal synchronous with the pilot signal contained in the composite signal; a synchronous detector circuit for receiving, as the inputs, the composite signal and the synchronous signal, and for thereby generating a DC voltage having an value proportional to the level of the pilot signal contained in the composite signal; and a pulse-forming circuit for receiving, as the inputs, the DC voltage and the synchronous signal, and for thereby forming a pulse, i.e. the extracted pilot signal, which is synchronous with the synchronous signal and which has an amplitude proportional to the value of the DC voltage. Thus is obtained a stable pilot signal having a correct frequency and phase without distortion or fluctuation and having a magnitude well proportional to the received pilot signal level, which pilot signal is very suitable for demodulation.
A pilot signal extracting circuitry for extracting a pilot signal from a composite signal consisting of plural signals modulated by a suppressed carrier modulation system, comprising:
Dependencies are inferred from the claim text.