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AssigneeHoneywell Information Systems Inc.
InventorsFrank V. Cassarino, Jr., George J. Bekampis, John W. Conway, Richard A. Lemay
Estimating the term…
In a data processing system which includes a common bus to which a plurality of units are connected for the transfer of information, information may be transferred by the highest priority requesting unit during an asynchronously generated bus transfer cycle. Logic is provided for enabling a split bus cycle operation in which the master unit requesting information from the slave unit during a first bus transfer cycle may receive such information from the slave unit during a later slave generated bus transfer cycle. Means are provided for enabling any other units to communicate over the common bus during the time between the first cycle and such later cycle during which the slave unit responds, thereby enabling at least two pairs of units to communicate with each other respectively in an interleaved manner.
A data processing system comprising a plurality of units coupled to transfer information over a common electrical bus between any two of said units during asynchronously generated information transfer cycles, said system further comprising:
A data processing system comprising a plurality of units coupled to transfer information over a common electrical bus between any two of said units during asynchronously generated information transfer cycles, said units having a priority based on the relative positions of said units from one end of said bus, said system comprising:
A data processing system comprising a plurality of units coupled to transfer information over a common electrical bus between any two of said units during asynchronously generated information transfer cycles, said units having a priority based on the relative positions of said units from one end of said bus, said units including at least a memory unit, a data processor unit and a controller unit, said system comprising:
Dependencies are inferred from the claim text.