CMOS oscillator having bias circuit outside oscillator feedback loop
AssigneeTime Computer, Inc.
InventorArthur H. O'Connor
Life of this patent
Estimating the term…
Abstract
Disclosed is a highly stable CMOS oscillator for use as the master time reference in a wristwatch. A novel bias circuit comprising a CMOS pair and a relatively large resistor supply a bias voltage to the amplifier of the oscillator. The resistor can be made larger than normal because it is outside the oscillator feedback loop and does not reduce the amplifier open loop gain.
Claims11
A low power oscillator comprising a complementary pair of MOS transistors, means coupled to at least one of said transistors forming an oscillatory feedback path for said one transistor, a source of bias potential for said one transistor, and a bias resistor external of said feedback path coupling said source to said transistor, said source of bias potential comprising a second complementary pair of MOS transistors.
A low power oscillator for use in a wristwatch comprising first and second pairs of complementary MOS transistors, a quartz crystal coupled between the gate and drain of at lease one transistor of said first pair, a tuning capacitor coupled to said quartz crystal for fine tuning the output frequency of said oscillator, the drains of said second pair of transistors being connected in common, and a bias resistor having a resistance of at least about 50 megohms coupled between the common drain electrodes of said second pair of transistors and the gate electrode of said one transistor of said first pair.
Dependencies are inferred from the claim text.