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US 3,947,822 AGranted
Processor of micro-computer with division of micro-instruction
AssigneeHitachi, Ltd.
InventorsKazuo Watanabe, Nobuo Hamamoto
Life of this patent
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Abstract
An operation control system for a micro-computer comprises a control unit and a register unit. A micro instruction stored in a read only memory of the control unit is fetched, a one word instruction is divided into six time stages and the divided instructions are transmitted to the register unit in a time-multiplexed format with each stage being a fundamental time unit, while the register unit decodes the micro instructions of the fundamental units fed thereto and executes the micro instructions of the fundamental units in a manner to overlap in time.
Claims10
A micro-computer having a control unit and an operation unit,
- said control unit comprising:
- a read only memory for storing a plurality of micro instructions,
- first means, coupled to said read only memory, dividing a micro instruction read out therefrom into a plurality of stages, each of which corresponds to a fundamental unit for controlling said operation unit, and
- second means, coupled to said first means, for transmitting the micro instructions divided into respective stages to said operation unit in a time-shared format;
- said operation unit comprising:
- third means, coupled to said second means, for storing micro instructions transmitted from said control unit according to the fundamental units into which the instructions are divided;
- fourth means, coupled to said third means, for decoding the stored micro instructions, and
- fifth means, coupled to said fourth means, for effecting the execution of the decoded micro instructions in a manner to partially overlap in time.
5 more elements
Dependencies are inferred from the claim text.