Electronic alarm watch
AssigneeUranus Electronics, Inc.
InventorArthur F. Cake
Life of this patent
Estimating the term…
Abstract
An electronic timepiece having a pulse generator for producing a high frequency time standard signal for a first divider circuit producing first low frequency timing signals in response to said time standard signal with logic means controlling said time standard signal in a second divider circuit at programmed times for producing second low frequency time signals, said first low frequency time signals and said second low frequency time signals being connected to comparative means to activate an alarm means when aligned.
Claims8
An electronic timepiece comprising:
- a means to generate a high frequency time-standard signal;
- a first divider means connected to said means to generate a high frequency time standard signal for producing low frequency signals in the form of segment driver pulses and digit driver pulses in response to said time standard signal;
- segment driver means connected to said first divider means to receive said segment driver pulses therefrom;
- digit driver means connected to said first divider means to receive digit driver pulses therefrom;
- digital display means connected to said segment driver means and said digit driver means for the digital display of time;
- a second divider means connected by a first logic gate means controlled by a digit pulse connection from said second divider means and a digit pulse connection from said first divider means for delivery of an output to an inverter connected to a second logic gate means input having another input connection from said means to generate a high frequency time signal such that said second divider means may be synchronized with said first divider means, said second divider means being also productive of segment driver pulses for connections to said segment driver means;
- a diode bridge circuit connection between portions of said second divider means to clamp a predetermined order of segment driver pulses to be eminating from said second divider means coordinated with a predetermined digit driver pulse;
- pure logic comparator means connected between said first divider means and said second divider means, said pure logic comparator means comprising a plurality of exclusive OR gates having a first input connection of each connected to the connections of said first divider means to said segment driver means and second input connections to the connections of said second divider means to said segment driver means, said exclusive OR gates being paired to provide a plurality of first output connections and a plurality of second output connections;
- logic switch means including a first NOR gate and a second NOR gate whose inputs are connected, respectively, to said first output connections and said second output connections of said pure logic comparator means to control a NAND gate having its inputs connected to the outputs of said first NOR gate and said second NOR gate such that there is produced a signal when said first divider means and said second divider means are producing comparable pulses in said connections to said segment driver means and said exclusive-OR gates;
- and
- indicator means connected to the output of said NAND gate of said logic switch means to be actuated by signals therefrom.
In an electronic timepiece having a tank circuit for a binary divider chain operatively connected to segment driver transmission gate means and to digit driver means for control of a digital display means selectively operable by manual switch means connected by logic means to the binary divider chain, the improvement of an alarm means comprising:
- another binary divider chain connected by a synchronization logic circuit to said tank circuit for providing information to the segment driver transmission gate means from said another binary divider chain that is equivalent to that from the timepiece binary divider chain;
- a gate circuit connected between the timepiece binary divider chain and said another binary divider chain including a plurality of exclusive OR gate means each having an input from the timepiece binary divider chain and another input from said another binary divider chain which are paired to portions of the transmission gate means to provide a comparator circuit means having output signals;
- and
- alarm means connected by logic gates to said gate circuit to be operable whenever said output signals are comparable.
Dependencies are inferred from the claim text.