Digital circuit for generating output pulses synchronized in time to zero crossings of incoming waveforms
AssigneeGeneral Dynamics Corporation
InventorBjorn E. Bjerede
Life of this patent
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Abstract
A digital phase locked loop circuit for use in synchronizing output timing pulses with the positive going zero-crossings of an input data signal by quantitizing the input analog data signal as digital information, storing the digital information at given times by timing pulses, pre-programming a counter with a count corresponding to the quantitized digital information stored, and advancing or lagging an updated timing pulse in accordance with the timed count of the program counter which count is synchronized with the zero-crossings of the input data signal, whereby the updated timing pulses move to synchronism with the zero-crossings of the input data signal.
Claims10
A digital phase locked loop circuit for generating timing pulses synchronized with zero-crossings of a periodic input data signal comprising,
- A to D converter means for continuously quantitizing to digital information the analog magnitude of a periodic input data signal,
- storage means responsive to timing pulses for sampling and storing the digital quantum of said digital information at the time of said timing pulses,
- counter means responsive to a given count respresentative of the stored digital quantum in said storage means for counting the given count in timed synchronism with the zero-crossing of the input signal and providing a carry pulse at the end of the count,
- pulse circuit means for receiving the carry pulse and providing an updated timing pulse output in time synchronism therewith, which timing pulse lags or leads the zero-crossing of the input data signal by the counting time of said counter means in counting said given count,
- and means for feeding said updated timing output pulse to said storage means, whereby the time advance or time delay of the updated timing pulse moves in time the timing output pulse to time synchronism with the zero-crossings of the input data signal.
Dependencies are inferred from the claim text.