Semiconductor image sensor

A semiconductor image pick-up device comprising:

• at least one column of image pick-up elements which includes:
• first to n.sup.th photodetectors, where n is an integer greater than two;
• first to n.sup.th pairs of field-effect transistors the sources of each transistor of each respective first to n.sup.th pair being connected to said first to n photodetectors;
• a first output line which interconnects the drains of each respective one of the transistors of said first to (n-1).sup.th pairs of field-effect transistors;
• a second output line which interconnects the drains of each respective other of the transistors of said first to n.sup.th pairs of field-effect transistors;
• a first input line which is connected to the gate of the other of the transistors of said first pair of field-effect transistors;
• second to n.sup.th input lines which interconnect the gates of each of the transistors of said first to (n-1).sup.th pairs of field-effect transistors to the gates of each other of the transistors of said second n.sup.th pairs of field-effect transistors, respectively;
• an (n+1).sup.th input line which is connected to the gate of one of the transistors of said n.sup.th pair of field-effect transistors;
• a differential amplifier circuit connected to said first and second output lines;
• and
• circuit means for applying signal readout pulses sequentially to said first to n.sup.th lines.

A semiconductor image pick-up device comprising

• at least one column of image pick-up elements which includes:
• first to n.sup.th photodetectors, where n is an integer greater than two,
• first to n.sup.th pairs of field-effect transistors, the source of each transistor of each respective first to n.sup.th pair being connected to said first to n.sup.th photodetectors;
• first and second auxiliary photodetectors,
• first and second auxiliary field effect transistors the sources of which are respectively connected to said first and second auxiliary photodetectors,
• a first output line which interconnects the drains of each respective one of the transistors of said first to n.sup.th pairs of field-effect transistors and the drain of said first auxiliary field-effect transistor,
• a second output line which interconnects the drains of each respective other of the transistors of said first to n.sup.th pairs of field-effect transistors and the drain of said second auxiliary field-effect transistor.
• a first input line which interconnects the gate of said first auxiliary field-effect transistor and the gate of the other transistor of said first pair of field-effect transistors,
• second to n.sup.th input lines which interconnect the gates of each respective one of the transistors of said first to (n-1).sup.th pairs of field-effect transistors and the gates of each respective other of the transistors of said second to n.sup.th pairs of field effect transistors, respectively,
• a clearing drive line which interconnects the gate of the one of the transistors of said n.sup.th pair of field-effect transistors and the gate of said second auxiliary field-effect transistor, and
• a differential amplifier circuit connected to said first and second output lines;
• and
• circuit means for applying signal readout pulses sequentially to said first to n.sup.th input lines.

A semiconductor image pick-up device comprising:

• a matrix of m rows by n columns of photodetectors, where m and n are positive integers greater than one and three, respectively;
• a matrix of m rows by n columns of field-effect transistors, the source of each respective transistor for each respective row and column being connected to the photodetector in that row and column;
• first to m.sup.th vertical address pulse input lines which interconnect the gates of the field-effect transistors of the first to m.sup.th rows, respectively;
• first to n.sup.th transmission lines which interconnect the drains of the field effect transistors of the first to n.sup.th columns;
• respectively;
• first, second and third field effect transistors, the sources of which are connected in common to said first transmission line;
• first to (n-2).sup.th pairs of field effect transistors, the sources of which are connected in common to said second to (n-1).sup.th transmission lines, respectively;
• fourth, fifth and sixth field-effect transistors, the sources of which are connected in common to said n.sup.th transmission line;
• a first output line which interconnects the drain of said second field-effect transistor, the drains of one of the transistors of said first to (n-2).sup.th pairs of field-effect transistors, and the drains of said fourth and sixth field effect transistors;
• a second output line which interconnects the drains of said first and third field-effect transistors, the drains of the other of the transistors of said first to (n-2).sup.th pairs of field-effect transistors, and the drain of said fifth field-effect transistors;
• a first horizontal address pulse input line which interconnects the gates of said first and second field-effect transistors;
• a second horizontal address pulse input line which interconnects the gate of said third field-effect transistor and the gate of the one transistor of said first pair of field-effect transistors;
• third to (n-1).sup.th horizontal address pulse input lines which interconnect each respective gate of the other transistor of said first to (n-3).sup.th pairs of field-effect transistors and each respective gate of the one of the transistors of said second to (n-2).sup.th pairs of field-effect transistors, respectively;
• an n.sup.th horizontal address pulse input line which interconnects the gate of the other of the transistors of said (n-2).sup.th pair of field-effect transistors and the gate of said fourth field-effect transistor;
• an (n+1).sup.th horizontal address pulse input line which interconnects the gates of said fifth and sixth field effect transistors;
• a differential amplifier circuit connected to said first and second output lines;
• first circuit means for applying vertical address pulses sequentially to said first to m.sup.th vertical address pulse input lines;
• and
• second circuit means for applying horizontal address pulses sequentially to said first to (n+1).sup.th horizontal address pulse input lines,
• so that the photodetectors of said matrix of photodetectors are sequentially subjected to readout.

A semiconductor image pick-up device comprising:

• a matrix of m rows by n columns of photodetectors, where m and n are positive integers greater than one;
• a matrix of m rows by n columns of field-effect transistors, the source of each respective transistor for each respective row and column being connected to the photodetector in that respective row and column;
• first to m.sup.th vertical address pulse input lines which interconnect the gate of the field-effect transistors of the first to m.sup.th rows, respectively;
• first to n.sup.th transmission lines which interconnect the drains of the field-effect transistors of the first to n.sup.th columns, respectively;
• first to n.sup.th pairs of field-effect transistors, the sources of which are connected in common and are respectively connected to the first to n.sup.th transmission lines;
• a first output line which interconnects the drains of each respective one of the transistors of said first to n.sup.th pairs of field-effect transistors;
• a second output line which interconnects the drains of the other of the transistors of said first to n.sup.th pairs of field-effect transistors;
• a first horizontal address pulse input line connected to the gate of the one transistor of said first pair of field-effect transistors;
• a second horizontal address pulse input line which interconnects the gate of said other of the transistors of said first pair of field-effect transistors and the gate of the one of the transistors of said second pair of field-effect transistors;
• third to n.sup.th horizontal address pulse input lines which interconnect the gates of each respective other transistor of said second to (n-1).sup.th pairs of field-effect transistors and the gates of each respective one transistor of said third to n.sup.th pairs of field-effect transistors, respectively;
• an (n+1).sup.th horizontal address pule input line connected to the gate of the other transistor of said n.sup.th pair of field-effect transistors;
• a differential amplifier circuit connected to said first and second output lines;
• first circuit means for applying vertical address pulses sequentially to said first to m.sup.th vertical address pulse input lines;
• second circuit means for applying horizontal address pulses sequentially to said first to (n+1).sup.th horizontal address pulse input lines;
• so that said matrix of m rows by n columns of photo-detectors are sequentially subjected to read-out.

A semiconductor image pick-up device comprising:

• first to n.sup.th photodetectors, where n is an integer greater than two;
• first to n.sup.th pairs of field-effect transistors, the sources of each transistor of each respective first to n.sup.th pair being connected to said first to n.sup.th photodetectors;
• a first output line which interconnects the drains of each respective one of the transistors of said first to n.sup.th pairs of field-effect transistors;
• a second output line which interconnects the drains of each respective other of the transistors of said first to n.sup.th pairs of field-effect transistors;
• a first address-pulse input line connected to the gate of the one transistor of said first pair of field-effect transistors;
• second to n.sup.th address-pulse input lines which interconnect the gates of each respective other transistor of said first to (n-1).sup.th pairs of field-effect transistors and the gates of each respective one transistor of said second to n.sup.th pairs of field-effect transistors;
• an ( n + 1 ).sup.th address pulse input line connected to the gate of the other transistors of said n.sup.th pair of field-effect transistors;
• a differential amplifier circuit connected to said first and second output lines;
• and
• circuit means for applying address-pulses sequentially to said first to ( n + 1 ).sup.th input lines.

A semiconductor image pick-up device comprising:

• first and second photodetectors disposed adjacent each other;
• a first pair of field-effect transistors having their sources connected to said first photodetector and disposed to receive an optical information input;
• a second pair of field-effect transistors having their sources connected to said second photodetector and disposed to receive an optical information input;
• an auxiliary photodetector, disposed adjacent and first photodetector;
• an auxiliary field-effect transistor, having its source connected to said auxiliary photodetector and disposed to receive no optical information input;
• a first output line which interconnects the drains of one of the transistors of each of said first and second pairs of field-effect transistors;
• a second output line which interconnects the drains of the other of the transistors of each of said first and second pairs of field-effect transistors, and the drain of said auxiliary field-effect transistors;
• a first input line which interconnects the gate of said auxiliary field-effect transistor and the gate of the one transistor of said first pair of field-effect transistors;
• a second input line which interconnects the gate of the other transistor of said first pair of field-effect transistors and the gate of the one transistor of said second pair of field-effect transistors;
• first circuit means, connected to said first and second output lines, for generating a signal representative of the difference of the signals appearing on said first and second output lines;
• second circuit means, coupled to said first input line, for applying a first signal readout pulse to the gates of said auxiliary field-effect transistor and the one transistor of said first pair of field-effect transistors, so as to couple said first photodetector and said auxiliary photodetector to said first and second output lines, respectively, whereby said first circuit means will generate a signal representative of the difference of the signals corresponding to the outputs of said first photodetector and said auxiliary photodetector;
• and
• third circuit means, coupled to said second input line, for applying a second signal readout pulse, subsequent to said first signal readout pulse, to the gates of the other transistor of said first pair of field-effect transistors and the one transistor of said second pair of field-effect transistors, so as to couple said photodetector and said first photodetector to said first and second output lines, respectively, whereby said first circuit means will generate a signal representative of the difference of the signals corresponding to the outputs of said second photodetector and said first photodetector.