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US 3,944,990 AGranted
Semiconductor memory employing charge-coupled shift registers with multiplexed refresh amplifiers
AssigneeIntel Corporation
InventorSunlin Chou
Life of this patent
Estimating the term…
Abstract
A serial memory employing a plurality of charge-coupled shift registers fabricated with MOS technology and using double layer polycrystalline silicon gates. Each shift register includes two pairs of parallel channels; charge flows in opposite directions in each pair of channels. Multiplexing is utilized to refresh charge between each pair of channels through two refreshing amplifiers, one disposed at each end of the channels. The topographical efficiency of the design permits fabrication of a dense memory.
Claims17
A charge-coupled memory comprising:
- a plurality of charge-coupled shift registers, each of said shift registers including a first pair of channels and a second pair of channels, each of said channels being defined by a first region and a second region;
- a plurality of refresh means each for receiving an output charge from said second regions of said first pair of channels and for providing a refreshed charge to said second regions of said second pair of channels, and for receiving an output charge from said first regions of said second pair of channels and for providing a refreshed charge to said first regions of said first pair of channels;
- multiplexing means for multiplexing charge between said refresh means and said second regions of said first pair of channels and said second pair of channels, and for multiplexing charge between said refresh means and said first regions of said second pair of channels and said first pair of channels;
- and
- phased signal means for shifting charge in said shift registers coupled to said shift registers;
- whereby information may be stored and refreshed in said shift registers.
3 more elements
In a charge-coupled memory, the combination of:
- a charge-coupled shift register having a first, second, third and fourth parallel channel, each channel having a first and a second end;
- a first and a second refresh amplifier, said first refresh amplifier being disposed adjacent to said first end of said parallel channels, and said second refresh amplifier being disposed adjacent to said second end of said parallel channels;
- multiplexing means for multiplexing charge between said first refresh amplifier and said first end of said first, second, third and fourth parallel channels, and for multiplexing charge between said second refresh amplifier and said second end of said first, second, third and fourth parallel channels;
- phased signal means for shifting charge in said first and second channels in one direction, and for shifting charge in said third and fourth channels in an opposite direction;
- whereby said parallel channels operate as a recirculating shift register in a memory.
2 more elements
A recirculating charge-coupled shift register comprising:
- a first and a second adjacent regions;
- a third and a fourth adjacent regions, said first and third regions defining a first channel and said second and fourth regions defining a second channel parallel to said first channel;
- a fifth and a sixth adjacent region;
- a seventh and an eighth adjacent region, said fifth and seventh regions defining a third channel and said sixth and eighth regions defining a fourth channel parallel to said first, second, third and fourth channels;
- a first refresh circuit for refreshing charge having an input coupled to said first and second regions and an output coupled to said seventh and eighth regions;
- a second refresh circuit for refreshing charge having an input coupled to said fifth and sixth regions and an output coupled to said third and fourth regions;
- multiplexing means for multiplexing charge between said first refresh circuit and the output of said first and second region and the input of said seventh and eighth regions and for multiplexing charge between said second refresh circuit and the output of said fifth and sixth regions and the input of said third and fourth regions;
- phased signal means for shifting charge in said first and second channels in one direction, and for shifting charge in said third and fourth channels in an opposite direction;
- whereby charge may be circulated in said first, second, third and fourth regions.
6 more elements
Dependencies are inferred from the claim text.