Phase-locked loop transceiver having automatic frequency offset selectability
AssigneeMotorola, Inc.
InventorJon M. De Laune
Life of this patent
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AssigneeMotorola, Inc.
InventorJon M. De Laune
Estimating the term…
This specification discloses a frequency synthesizer or phase-locked loop transceiver operating from a reference oscillator source, F.sub.REF. A single phase-locked loop system for the transceiver includes counter means located in a feedback path connected between a voltage controlled oscillator (VCO) and a digital phase detector. The counter is preset to a predetermined number N for generating a frequency representation ##EQU1## The counter means includes logic and decoding circuitry for automatically modifying the ##EQU2## signal representation by a factor M for generating a feedback signal F.sub.F, where F.sub.F is ##EQU3## The feedback signal representation ##EQU4## is applied to the digital phase detector for generating a transmit or receive signal .sup.F OUT, where .sup.F OUT = .sup.F REF .sup.(N .+-. M).
A phase-locked loop system for generating an output signal F.sub.OUT from any first predetermined frequency varying signal N and any second frequency varying signal M offset from said first predetermined frequency varying signal a predetermined amount in response to a reference signal F.sub.REF comprising:
Dependencies are inferred from the claim text.