Video recorder pre-emphasis, de-emphasis circuits
AssigneeBASF SE
InventorEugene A. Cooper
Life of this patent
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Abstract
Improved circuits for pre-emphasis and de-emphasis of video luminance signals, the improvement comprising the utilization of field effect transistors in a non-linear frequency-discriminating network; and automatic circuitry useful in both recording and reproduction of recorded video information.
Claims4
In a wide band signal translating arrangement a pre-emphasizing circuit comprising a pre-emphasis network with a frequency response characteristic accentuating the high-frequency components of a translated signal as a continuous direct function of its frequency and, coupled to said pre-emphasis network, a frequency-discriminating network having an amplitude response characteristic non-linearly accentuating attenuation of high-frequency signals of high amplitude,
- said frequency discriminating network including the series combination of a capacitor and the source-electrode/drain-electrode path of at least one field effect transistor, said combination being connected in shunt relation to the output side of said circuit and the gate-electrode of said field effect transistor being connected to the input side of said circuit.
In a wide band signal translating arrangement a de-emphasizing circuit comprising a de-emphasis network with a frequency response characteristic de-emphasizing the high-frequency components of a translated signal as a continuous direct function of its frequency, and, coupled to said de-emphasis network through a transistor device, a frequency discriminating network having an amplitude response characteristic non-linearly accentuating high-frequency signals of high amplitude;
- said transistor device having its base electrode connected to the input of said circuit, its emitter connected to a degenerative emitter resistor and its collector connected to said de-emphasis network and to the output of said circuit;
- and
- said frequency discriminating network including the series combination of a capacitor and the source-electrode/drain-electrode path of at least one field effect transistor, said combination being connected in shunt relation to said degenerative emitter resistor and the gate-electrode of said field effect transistor being connected to the input of said circuit.
Dependencies are inferred from the claim text.