Spike enable circuit

A radar receiver system comprising:

• a first receiver channel responsive to signals received via a main antenna having a predetermined main lobe pattern along a reception axis;
• a second receiver channel responsive to signals received via an auxiliary antenna having a pattern of odd symmetry relative to said main lobe pattern of said main antenna;
• a compare circuit responsive to simultaneous output signals from said first receiver channel and said second receiver channel;
• threshold level circuit means responsive to video output signals from said second receiver channel to produce an output signal whenever said video output signal exceeds said threshold level;
• fast time constant circuit means responsive to video output signals from said second receiver channel;
• logic means responsive to output signals from said threshold level circuit means and said fast time constant circuit means to produce an output signal upon coincidence of said output signals;
• switch means having a first position responsive to output signals from said compare circuit and providing for side-lobe blanking operation and a second position responsive to output signals from said logic means.

An improved radar receiver system having a first receiver channel responsive to signals received via a main antenna exhibiting a predetermined main lobe pattern along a reception axis, and having a second receiver channel responsive to signals received via an auxiliary antenna, and a compare circuit responsive to simultaneous output signals from said first receiver channel and said second receiver channel to develop a side-lobe blanking signal whenever the output signal received from said second receiver channel is greater than the output signal received from said first receiver channel, wherein the improvement comprises:

• threshold level circuit means responsive to video output signals from said second receiver channel to produce an output signal whenever said video output signal exceeds said threshold level;
• fast time constant circuit means responsive to video output signals from said second receiver channel for producing output signals whenever said video output signal contains interference pulses having rise times of such duration as to result in wavefront steepnesses exceeding a predetermined value;
• logic means responsive to output signals from said threshold level circuit means and said fast time constant circuit means to produce an output signal upon coincidence of said output signals;
• and
• switch means having a first position responsive to output signals from said compare circuit and providing for a side-lobe blanking operation and a second position responsive to output signals from said logic means.