Process for the fabrication of silicon transistors with high DC current gain
AssigneeSanken Electric Co., Ltd.
InventorYutaka Yoshizawa
Life of this patent
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Abstract
A monocrystalline silicon wafer is prepared which has formed therein the usual emitter, base and collector regions. A groove is then formed to a predetermined depth in the top surface of the silicon wafer so as to extend along the P-N junction between the base and emitter regions. A silicon oxide layer is formed over the wafer, as by heating the same in an oxidative atmosphere, and the wafer is succeedingly heated in a hydrogenous atmosphere. The silicon oxide layer may be selectively photoetched away where the electrodes are to be formed for the emitter, base and collector of the transistor.
Claims13
In a process for the fabrication of a high DC current gain transistor, the improvement comprising the steps of providing a monocrystalline silicon wafer having a top surface and having formed therein an emitter region of one conductivity type, a base region of the opposite conductivity type from said emitter region, and a collector region of said one conductivity type, at least said emitter and base regions extending to said top surface, said emitter region being confined within said base region whereby a P-N junction is formed therebetween, forming a groove in said top surface so as to extend along said P-N junction, said groove having a depth less than the depth of said emitter region, forming a silicon oxide layer at least over said groove, and heating said wafer in a hydrogenous atmosphere.
In a process for the fabrication of a high DC current gain transistor, the improvement comprising the steps of providing a monocrystalline silicon wafer having a top surface and having formed therein a collector region of one conductivity type, diffusing a first impurity substance into said wafer from said top surface to a predetermined depth to form a base region of the opposite conductivity type from said collector region, diffusing a second impurity substance into said waffer from said top surface to form within said base region a relatively shallow emitter region of said one conductivity type having a depth considerably less than said depth of said base region, diffusing said first impurity substance into said wafer from said top surface to form a relatively shallow low-resistance base portion of said opposite conductivity type having a depth considerably less than said depth of said base region, said shallow low-resistance base portion directly surrounding said shallow emitter region whereby a P-N junction is formed therebetween, the concentration of said first impurity substance being made higher in said shallow low-resistance base portion than in said base region only to such an extent that no layer of said opposite conductivity type is formed in said shallow emitter region, forming a groove in said top surface so as to extend along said P-N junction, said groove having a depth less than said depth of said base region, forming a silicon oxide layer at least over said groove, causing said shallow emitter region and said shallow low-resistance base portion to increase in depth to predetermined degrees greater than said depth of said groove, and heating said wafer in a hydrogenous atmosphere.
Dependencies are inferred from the claim text.