Semiconductor device with multi-layered metal interconnections

A semiconductor device comprising a semiconductor body having a surface, plural layers of insulating material over the surface of the semiconductor body and including a first insulating layer on said semiconductor surface, a first metal layer on said first insulating layer over at least part of its length and connected to a region of said semiconductor body at the surface, a second metal layer over said first insulating layer and laterally extending with respect to said first metal layer, and a third metal layer over said first insulating layer and connected to both said first and second metal layers, the second metal layer extending substantially entirely on the free surface of the uppermost insulating layer and being connected via at least one aperture in the uppermost insulating layer to the third metal layer, the third metal layer being situated substantially entirely between two of said insulating layers, the metal of the third metal layer being different from the metal of the first and second metal layers and forming with the latter where connected stable low-ohmic junction areas, the third metal layer being located relative to the first and second metal layers such that the projections onto the body surface of the junction areas where the third metal layer connects to the first and second metal layers are laterally spaced from one another whereby said junction areas are in non-overlying relationship.