Pattern recognition system
AssigneeHitachi, Ltd.
InventorsYoshiji Fujimoto, Shozo Kadota, Michio Yasuda, Shinichi Hayashi, Toshihiro Hananoi
Life of this patent
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Abstract
A character pattern recognition system is disclosed in which an unknown input pattern of character and a standard pattern of character are described and maintained in the form of a sequence of Freeman direction codes. One-to-multiple and multiple-to-one correspondence is permitted between the codes, to obtain a specific correspondence between them in which the sum of the difference between direction codes is minimum, so that the minimum value of code difference is used as a measure of determining the similarity between the two patterns.
Claims2
In a character recognition system in which line components making up an unknown character pattern and a standard character pattern are approximated by means of a plurality of directional small straight lines in the number of n, each of the patterns being described in the form of a plurality of codes representing the directions of said small straight lines along said component lines, said two code groups A.sub.k = a.sub.k (0), a.sub.k (1), a.sub.k (2) . . . a.sub.k (I.sub.k), and B.sub.k = b.sub.k (0), b.sub.k (1), b.sub.k (2) . . . b.sub.k (J.sub.k) being used to effect a character recognition;
- the improvement comprising first and second registers for respectively storing said direction codes A.sub.k and B.sub.k, a direction difference calculator circuit for calculating the difference between the direction codes, that is,
- d(a.sub.k (i), b.sub.k (j))
- =.vertline.a.sub.k (i) - b.sub.k (j) .vertline. if .vertline.a.sub.k (i) - b.sub.k (j).vertline..ltoreq.(n/2)
- = n - .vertline.a.sub.k (i) - b.sub.k (j).vertline. if .vertline.a.sub.k (i)-b.sub.k (j) .vertline.>(n/2),
- in response to the direction codes a.sub.k (i) and b.sub.k (j) sequentially applied thereto from said first and second registers, a minimum value detector circuit for obtaining the minimum value of g(i, j-1) +.sigma., g(i-1, j) + .sigma., and [g(-1)], .sigma.being constant, when d(a.sub.k (0), b.sub.k (0)) is defined as g(0, 0), an adder for obtaining a sum g(i, j) of the output d(a.sub.k (i), b.sub.k (j)) of said direction difference calculator circuit and the output min{g(i, j-1) +.sigma., g(i-1, j) +.sigma., [g(i-1, j-1)]}of said minimum value detector circuit, and a circuit means for taking out the output g(I.sub.k, J.sub.k) from the output g(i, j) of said adder.
Dependencies are inferred from the claim text.