Circuit arrangement for controlling the running of a quartz-controlled electric clock

In a circuit arrangement for a quartz-controlled electric clock which can be set, the circuit arrangement including a supply voltage source, a motor, an oscillator stage, frequency divider stages connected to said oscillator stage, pulse shaper stages connected to said frequency divider stages, and two output stages connected to said pulse shaper stages for controlling the drive of the motor, at least the oscillator stage and each output stage each being composed of at least one Metal-Insulator-Semiconductor field effect transistor having a controllable current path, the improvement comprising a switch arranged to be operated during setting of the clock and connected to the controllable current paths of said transistors only in said oscillator stage and said two output stages for disconnecting said current paths from the supply voltage source, in order to terminate oscillation of said oscillator stage and stop said motor whereby said voltage source remained connected to said frequency divider stages during setting of the clock.