Electronic timepiece semiconductor intergrated circuit
AssigneeKabushiki Kaisha Suwa Seikosha
InventorShinji Morozumi
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Abstract
A semiconductor integrated circuit especially suitable for use in electronic timepieces to improve the operation thereof is provided. An integrated circuit chip including complementary coupled P-channel and N-channel MOS field effect transistors having insulation placed therebetween by forming same spaced on an insulating substrate. The insulation effects reduced current consumption to thereby enhance the life of the battery in an electronic timepiece.
Claims9
In an electronic timepiece including an oscillator circuit for providing high frequency time standard signals, a divider circuit including a plurality of series-connected divider stages having applied thereto a high frequency time-keeping signal and in response thereto supplying low frequency timekeeping signals corresponding to present time, and display means for receiving and displaying time in response to said timekeeping signals counted by said dividing circuit, the improvement comprising said oscillator circuit and each of said divider stages being integrated on a single circuit chip having a substrate formed from an insulating material including complementary coupled P-channel and N-channel MOS field effect transistors formed on the insulating substrate thereof in layers, the respective transistors on said substrate having a space therebetween.
Dependencies are inferred from the claim text.