Parity checking a double-frequency coherent-phase data signal

Abstract

Method and apparatus are described for storing and retrieving data in the form of double-frequency coherent-phase signals having a plurality of "n" data bits, and particularly for making a parity check of such data. To make the parity check, the level of the signal is sampled at a first point between the beginning and middle of the first data bit, and at a second point between the middle and the end of the "n"th data bit. The levels of the two samples are compared, and a parity bit is generated of a level determined by whether "n" is an odd or even number, and whether there is to be odd or even parity. Described is a parity generating means in the form of an EXCLUSIVE-OR logical network to provide odd parity when "n" is an even number, or to provide even parity when "n" is an odd number. Also described is an equivalent logical network which can be used for effecting an even parity check when "n" is an even number, or an odd parity check when "n" is an odd number.

Dependencies are inferred from the claim text.