Frequency summing device
AssigneeCompagnie Industrielle des Telecommunications Cit-Alcatel
InventorsGeorges Levasseur, Michel Garconnat
Life of this patent
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Abstract
Frequency summing device comprising a summing element effecting the summing of the output signals of a first multiplier receiving a signal whose frequency is f and a signal whose frequency is F and of a second multiplier receiving the signal whose frequency is f and the signal whose frequency is F after dephasing by 90.degree.. The dephasing by 90.degree. is obtained by a complex circuit comprising three elementary dephasers in series provided with an attenuator and an adder effecting the sum of the output signals of the attenuator and of the first dephaser.
Claims10
Device for summing two first and second sinusoidal signals of frequency F and f, respectively, comprising a first dephasing circuit receiving said first signal and providing a third signal whose frequency is F dephased 90.degree. in relation to the said first signal, a second dephasing circuit receiving said second signal and providing a fourth signal whose frequency is f dephased by 90.degree. in relation to said second signal, a first and a second analog multiplier each comprising two inputs, said first multiplier receiving on one of its inputs a signal whose frequency is F and a signal whose frequency is f taken from the group of signals constituted by said first, second, third and fourth signals, said second multiplier receiving at its inputs, the two remaining signals of said group, and an adder having inputs connected to the outputs of said two multipliers, characterized in that the frequency f varies in a frequency band centered on the frequency fo and in that said second dephasing circuit comprises a first elementary dephaser receiving on its input said second signal whose frequency is f and providing at its output an intermediate signal whose amplitude is equal to the amplitude of said second signal and whose dephasing in relation to the said second signal depends on the frequency f, that dephasing being equal to 90.degree. for the frequency fo, a second and a third elementary dephaser connected in series to the output of the said first elementary dephaser, an attenuator having an attenuation factor of 3 whose input is connected to the output of said third elementary dephaser, and an adder having two inputs connected to the output of the said first elementary dephaser and of said attenuator, respectively, and whose output provides said fourth signal.
A device for summing a first and a second sinusoidal signal of frequency F and f, respectively, comprising a first dephasing circuit receiving said first signal and providing a third signal whose frequency is F dephased 90.degree. in relation to said first signal;
- a second dephasing circuit receiving said second signal and providing a fourth signal whose frequency is f dephased by 90.degree. in relation to said second signal, said second dephasing circuit including a first elementary dephaser which receives on its input said second signal and provides at its output an intermediate signal whose amplitude is equal to the amplitude of said second signal and whose dephasing in relation to said second signal depends on the frequency f, a second and a third elementary dephaser connected in series to the output of said first elementary dephaser, an attenuator whose input is connected to the output of said third elementary dephaser, and an adder having two inputs respectively connected to the output of said first elementary dephaser and to the output of said attenuator and whose output provides said fourth signal;
- a first multiplier having first and second inputs, said first input receiving one of said first, second, third and fourth signals and said second input receiving another of said first, second, third and fourth signals;
- a second multiplier having first and second inputs, said first input of said second multiplier receiving another of said first, second, third and fourth signals and said second input of said second multiplier receiving the remaining one of said first, second, third and fourth signals;
- and an adder having inputs connected to the outputs of said first and second multipliers.
Dependencies are inferred from the claim text.