Digital echo suppressor

An echo suppressor adapted for connection between the receive and send lines of a communications circuit to reduce send line echo, comprising:

• a. first means, connected to receive signals on said receive line and said send line, for producing, at an output thereof, in alternating sequence receive line digital codes representative of a first signed absolute values of said receive line signals and send line digital codes representative of an opposite signed absolute values of said send line signals,
• b. first digital summation means connected to said first means for accumulating the sum of said receive line digital codes over repetitive fixed first periods of time,
• c. suppression hangover means connected to said first digital summation means for providing an interrupt output for a first predetermined hangover time when said sum accumulated by said first digital summation means equals or exceeds a predetermined threshold value,
• d. second digital summation means connected to said first means for accumulating the sum of said receive line and send line digital codes over said repetitive fixed first periods of time,
• e. storage means connected to said second digital summation means for storing indicia representing the signs of the last N sums accumulated by said second digital summation means, and
• f. break-in logic means connected to said storage means and to said suppression hangover means for providing a break-in output for a second predetermined hangover time when M of the indicia stored in said storage means represent said opposite sign and said suppression hangover means is providing said interrupt output, where M is a predetermined positive number less than N.