Fet and bipolar device and circuit process with maximum junction control

A method for producing dielectrically isolated electronic devices on a supporting electrically isolated substrate comprising the steps of:

• a. forming a plurality of orientation-dependent-etched grooves of precisely-known, different depths in a low-resistivity monocrystalline semiconductor body of one conductivity type,
• b. forming an insulation layer on said body and in said grooves,
• c. depositing a polycrystalline semiconductor support layer on said insulation layer,
• d. removing monocrystalline semiconductor material from the backside of said body, until a first layer having the desired thickness is achieved, as indicated by exposure of said insulation layer in the bottom of a selective groove,
• e. forming a second monocrystalline semiconductor layer of the other conductivity type overlying said first layer, to a desired thickness as indicated by said grooves,
• f. forming isolation moats circumscribing said first and second layers at a location spaced from said grooves, said moats extending to said substrate and providing a single crystalline mesa comprising said first and second layers, and
• g. forming semiconductor pockets of said other conductivity type selectively spaced within the surface of said second layer to provide active device regions.