Method and apparatus for controlling circuitry with a plurality of switching means
AssigneeGeneral Electric Company
InventorDavid N. Sitter
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Abstract
The potential errors introduced by contact bounce are eliminated by a system which accepts applied key data. The system will accept key data provided first, that it is a proper logic code; second, that the system is in a state to accept new data; and, finally, that it is either different than the previous acceptable logic code or that it is preceded by a no key period measurably exceeding the contact bounce time and shorter than the normal human response time of the typist.
Claims27
A method for controlling the operation of circuitry in response to an analysis of the operation of individual ones of a plurality of switching means wherein said switching means produces at its output a respective signal in response to operation of individual ones of said switching means comprising the steps of storing a first produced signal in a second storage unit, storing a second produced signal in a first storage unit, replacing the contents of said second storage unit with the contents of said first storage unit, said replacing step comprising sensing the contents of said first storage unit to provide a first indication only in response to the contents of said first storage unit being sensed as representing the operation of only a single switching means, sensing the contents of said first and second storage unit and comparing the sensed contents of said first and second storage units to provide a second indication only in response to the contents of said first storage unit being different from that of the second storage unit, replacing the contents of said second storage unit with the contents of said first storage unit in response to said first and second indications, and controlling the operation of said circuitry in response to the contents of said second storage unit.
Apparatus for controlling circuitry in response to operation of individual ones of a plurality of switching means, comprising means for producing a respective signal in response to operation of each of said switching means wherein each signal represents the operation of a particular switching means, first storage means for storing said signals, second storage means for storing said signals after being stored in said first storage means, means for sensing signals stored in said first and second storage means, means for replacing signals stored in said second storage means with signals stored in said first storage means in response to signals sensed in said first storage means representing operation of only any one of said switching means and said signals sensed in said first storage means not being identical to the signals sensed in said second storage means, and means for operating said circuitry in response to signals stored in said second storage means.
A method of controlling the operation of circuitry in response to an analysis of respective signals representing operation of individual ones of a plurality of switching means comprising, storing a first one of said signals in a storage device, sensing said stored first signal, sensing a second one of said signals, replacing said second signal with said first signal in said storage device in response to said sensed second signal representing operation of only any one of said switching means and said sensed stored first signal being different than said sensed second signal and controlling the operation of said circuitry in response to said stored signal.
Apparatus for controlling the operation of circuitry in response to operation of individual ones of a plurality of switching means comprising means for producing at its output a respective signal in responses to successive operation of individual ones of said switching means wherein each signal represents the operation of a particular switching means, a signal storage means, means for applying a first one of said produced signals to said storage means for storage, means for sensing said stored first produced signals, means for sensing a second one of said produced signals, means for replacing said second signal with said first signal in said storage means in response to said sensed second signal representing operation of only any one of said switching means and not being identical to said sensed first signal, and means for controlling the operation of said circuitry response to the signals stored in such storage means.
In combination, a set of keyboard keys, means for operating each of said keys to produce a respective valid data signal representative of the operation of each of such keys, a signal storage device, means for gating each produced signal from said set of keys to said storage device for storage therein, a utilization circuit, means for applying each produced signal stored in said storage device to said utilization circuit, means responsive to concurrent operation of multiple keys or to nonoperation of any keys to provide a first and second control signal respectively, means for comparing a second produced signal prior to being gated with a first produced signal stored in said storage device to provide a third control signal only when said last named compared signals are identical, means responsive to said first, second or third control signals for blocking the gating of signals from said set of keys to said storage device by said gating means, means responsive to said second control signal for providing a fourth control signal after a predetermined time delay, means for clearing any signal stored in said storage means in response to said fourth control signal, and means responsive to a data signal being produced before said time delay has transpired for terminating the production of said fourth control signal.
In combination, a set of keyboard keys, means for operating each of said keys to produce a respective valid digital data signal representative of the proper operation of each of such keys and an invalid digital data signal representing concurrent multiple key operation or no-key operation, a signal storage register, means for gating each produced signal from said set of keys to said storage register for storage therein, a utilization circuit, means for applying each produced signal stored in said storage register to said utilization circuit, means responsive to a produced signal representing concurrent operation of multiple keys or to non-operation of any keys to provide a first and second control signal respectively, means for comparing a second produced signal prior to being gated with a first produced signal stored in said storage register to provide a third control signal only when said last named compared signals are identical, means responsive to said first, second or third control signals for blocking the gating of signals from said set of keys to said storage register by said gating means, means responsive to said second control signal for providing a fourth control signal after a predetermined time delay, means for clearing any signal stored in said storage register in response to said fourth control signal, and means responsive to a data signal being produced before said time delay has transpired for terminating the production of said fourth control signal.
Dependencies are inferred from the claim text.