Foundry Compatible, Ultra-low Resistance, Under-Bump-Metallization for Electroplated Bumps

Abstract

Semiconductor structures for foundry compatible, ultra-low resistance, under-bump-metallization for electroplated bumps are described. An example semiconductor structure includes a semiconductor-based substrate. The semiconductor structure further includes a barrier layer disposed on the semiconductor-based substrate. The semiconductor structure also includes a seed layer disposed on the barrier layer. The barrier layer is configured to mitigate atom diffusion from the seed layer into the substrate. Moreover, the semiconductor structure includes a capping layer disposed on the seed layer. The capping layer is configured to resist oxidation of the seed layer. Additionally, the semiconductor structure includes a solder bump disposed on the capping layer.

Dependencies are inferred from the claim text.