Semiconductor device including bump structure

A semiconductor device comprising:

• a substrate;
• one or more wiring layers disposed over the substrate;
• a passivation layer disposed over the one or more wiring layers;
• one or more conductive layers disposed over the passivation layer;
• an isolation structure formed in the one or more conductive layers to isolate a part of the one or more conductive layers, wherein an upper surface of the isolation structure is planarized to an uppermost surface of the one or more conductive layers;
• a first metal pad disposed over the part of the one or more conductive layers and partially over the isolation structure;
• and
• a second metal pad disposed over the one or more conductive layers and electrically isolated from the first metal pad.

A semiconductor device comprising:

• a substrate;
• a semiconductor circuit on the substrate;
• a passivation layer over the semiconductor circuit;
• a conductive layer over the passivation layer;
• an isolation structure recessed within the conductive layer and isolating a part of the conductive layer, wherein an upper surface of the isolation structure is planarized to an upper surface of the conductive layer;
• a first metal pad over the part of the conductive layer and partially over the isolation structure;
• a second metal pad over the conductive layer and electrically isolated from the first metal pad;
• and
• a micro-electro mechanical system connected to the first and second metal pads.