System-in-package (sip) configured to receive multiple memory dies
AssigneeQUALCOMM Incorporated
InventorsRyan LANE, Charles David PAYNTER, Li-Sheng WENG, John HOLMES, Feng ZHU, Akshay BILAGI
Life of this patent
Estimating the term…
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AssigneeQUALCOMM Incorporated
InventorsRyan LANE, Charles David PAYNTER, Li-Sheng WENG, John HOLMES, Feng ZHU, Akshay BILAGI
Estimating the term…
A package includes one or more dies that include one or more processors and a substrate that defines multiple empty memory attach regions. The substrate includes a first set of contacts electrically coupled to the one or more dies and multiple second sets of contacts within the multiple empty memory attach regions. At least a portion of each of the multiple second sets of contacts is exposed along an upper surface of the substrate. The multiple second sets of contacts are configured to be electrically coupled to multiple memory dies. The substrate also includes one or more conductors that electrically couple the first set of contacts to the multiple second sets of contacts.
A package comprising:
A package comprising:
A method of fabrication, the method comprising:
Dependencies are inferred from the claim text.