Image sensor with shared gate architecture for metal layer reduction

Abstract

An image sensor comprising a semiconductor substrate, a first source region, a second source region, and a shared gate electrode is described. The semiconductor substrate includes a first side and a second side opposite the first side. The first source region and the second source region are each disposed within the semiconductor substrate proximate to the first side. The first source region is separated from the second source region by an isolation structure disposed within the semiconductor substrate between the first source region and the second source region. The shared gate electrode is disposed proximate to the first side of the semiconductor substrate and coupled to the first source region and the second source region to respectively form a first transistor and a second transistor.

Dependencies are inferred from the claim text.