Power gating cell structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Ling Chang, Jung-Chan Yang, Li-Chun Tien, Ting Yu Chen
Life of this patent
Estimating the term…
Abstract
A power gating cell on an integrated circuit is provided. The power gating cell includes: a central area; a peripheral area surrounding the central area; a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction; and a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction.
Claims20
A method of fabricating a power gating cell on an integrated circuit, comprising:
- providing a substrate, wherein there is a first active region and a plurality of second active regions on the substrate, the first active region located in a central area of the power gating cell and having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction, the plurality of second active regions located in a peripheral area of the power gating cell adjacent the central area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction;
- forming fin structures over the first active region and the plurality of second active regions;
- doping source regions and drain regions of the fin structures;
- and
- forming gate structures over the fin structures in the first active region and the plurality of second active regions.
A method of fabricating a power gating cell on an integrated circuit, comprising:
- forming a central area;
- forming a peripheral area surrounding the central area;
- forming a first active region in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;
- and
- forming a plurality of second active regions in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction,
- wherein the at least one and no more than three fin structures corresponding to each of the plurality of second active regions are not aligned with a set of global fin grids.
A method of fabricating a power gating cell on an integrated circuit, comprising:
- forming a central area;
- forming a peripheral area adjacent the central area;
- forming a first active region in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;
- forming a plurality of second active regions in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction;
- and
- forming a third active region in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction,
- wherein the power gating cell is a header cell configured to cut off a power supply to a standard logic cell on the integrated circuit in response to a control signal.
Dependencies are inferred from the claim text.