Stacked multi-gate device with diffusion stopping layer
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Yu LIN, Tien-Shun CHANG, Yi-Syuan SIAO, Su-Hao LIU, Chi On CHUI
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Yu LIN, Tien-Shun CHANG, Yi-Syuan SIAO, Su-Hao LIU, Chi On CHUI
Estimating the term…
A device includes a bottom transistor, a top transistor, and an insulator layer. The bottom transistor includes a first channel layer; first source/drain epitaxial structures on opposite sides of the first channel layer; a first gate structure around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer; second source/drain epitaxial structures on opposite sides of the second channel layer; and a second gate structure around the second channel layer. The insulator layer is between the bottom transistor and the top transistor. A first portion of the insulator layer in contact with one of the second source/drain epitaxial structures has a dopant concentration higher than a dopant concentration of a second portion of the insulator layer directly between the first gate structure and the second gate structure.
A device, comprising:
A device, comprising:
A device, comprising:
Dependencies are inferred from the claim text.