Fin end isolation structure for semiconductor devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon Jhy LIAW
Life of this patent
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Abstract
A semiconductor structure includes: first and second semiconductor fins, wherein the first and the second semiconductor fins are lengthwise aligned along a first direction; an isolation structure adjacent to sidewalls of the first and the second semiconductor fins; first and second gate structures disposed over the isolation structure, the first gate structure disposed over the first semiconductor fin, and the second gate structure disposed over the second semiconductor fin; and a spacer layer that is disposed on a sidewall of the first gate structure and on a sidewall of the second gate structure and extends continuously through a trench between an end of the first semiconductor fin and an end of the second semiconductor fin.
Claims20
A semiconductor structure, comprising:
- first and second semiconductor fins, wherein the first and the second semiconductor fins are lengthwise aligned along a first direction;
- an isolation structure adjacent to sidewalls of the first and the second semiconductor fins;
- first and second gate structures disposed over the isolation structure, the first gate structure disposed over the first semiconductor fin, and the second gate structure disposed over the second semiconductor fin;
- and
- a spacer layer that is disposed on a sidewall of the first gate structure and on a sidewall of the second gate structure and extends continuously through a trench between an end of the first semiconductor fin and an end of the second semiconductor fin.
A semiconductor structure, comprising:
- first and second semiconductor fins lengthwise aligned along a first direction, and a first end of the first semiconductor fin faces a second end of the second semiconductor fin;
- a first isolation structure adjacent to sidewalls of the first and the second semiconductor fins;
- first and second gate structures disposed over the first isolation structure, the first gate structure disposed over the first semiconductor fin, and the second gate structure disposed over the second semiconductor fin;
- and
- a second isolation structure extending from the first end of the first semiconductor fin to the second end of the second semiconductor fin, wherein the first and the second isolation structures include different dielectric materials.
A semiconductor structure, comprising:
- first and second semiconductor fins extending lengthwise aligned along a first direction from a top view;
- an isolation structure adjacent to the first and the second semiconductor fins;
- first and second gate structures, wherein the first gate structure is disposed over both the isolation structure and the first semiconductor fin, and the second gate structure is disposed over both the isolation structure and the second semiconductor fin;
- and
- a spacer layer disposed on a sidewall of the first gate structure, a sidewall of the second gate structure, a vertical end of the first semiconductor fin, and a vertical end of the second semiconductor fin.
Dependencies are inferred from the claim text.