Semiconductor device and manufacturing method of the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsSatoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
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Abstract
A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.
Claims11
A semiconductor device comprising:
- a first transistor comprising silicon in a first channel formation region;
- a second transistor comprising a second channel formation region;
- a third transistor comprising a third channel formation region;
- and
- a capacitor,
- wherein a first insulator is provided over the first channel formation region of the first transistor,
- wherein a first conductor is provided over the first insulator,
- wherein the first conductor comprises a region configured to function as a first gate electrode of the first transistor,
- wherein a second insulator is provided over the first conductor,
- wherein an oxide semiconductor comprising the second channel formation region of the second transistor and the third channel formation region of the third transistor is provided over the second insulator,
- wherein a second conductor, a third conductor, and a fourth conductor are in contact with a top surface of the oxide semiconductor,
- wherein the second conductor comprises a region configured to function as one of a source electrode and a drain electrode of the second transistor,
- wherein the one of the source electrode and the drain electrode of the second transistor is electrically connected to one of a source electrode and a drain electrode of the first transistor,
- wherein the third conductor comprises a region configured to function as one of a source electrode and a drain electrode of the third transistor and a region configured to function as the other of the source electrode and the drain electrode of the second transistor,
- wherein the third conductor is electrically connected to the first conductor and one electrode of the capacitor,
- wherein the fourth conductor comprises a region configured to function as the other of the source electrode and the drain electrode of the third transistor,
- wherein a third insulator is provided over the oxide semiconductor,
- wherein a fifth conductor is provided over the third insulator,
- wherein the fifth conductor comprises a region configured to function as a first gate electrode of the third transistor,
- wherein a sixth conductor is provided over the oxide semiconductor,
- wherein the sixth conductor is configured to function as a first gate electrode of the second transistor,
- wherein a fourth insulator is provided over the fifth conductor, the sixth conductor, and the one electrode of the capacitor,
- wherein a seventh conductor is provided over the fourth insulator, and
- wherein the seventh conductor comprises a region configured to function as the other electrode of the capacitor.
A semiconductor device comprising:
- a first transistor comprising silicon in a first channel formation region;
- a second transistor comprising a second channel formation region;
- a third transistor comprising a third channel formation region;
- and
- a capacitor,
- wherein a first insulator is provided over the first channel formation region of the first transistor,
- wherein a first conductor is provided over the first insulator,
- wherein the first conductor comprises a region configured to function as a first gate electrode of the first transistor,
- wherein a second insulator is provided over the first conductor,
- wherein an oxide semiconductor comprising the second channel formation region of the second transistor and the third channel formation region of the third transistor is provided over the second insulator,
- wherein a second conductor, a third conductor, and a fourth conductor are in contact with a top surface of the oxide semiconductor,
- wherein the second conductor comprises a region configured to function as one of a source electrode and a drain electrode of the second transistor,
- wherein the one of the source electrode and the drain electrode of the second transistor is electrically connected to one of a source electrode and a drain electrode of the first transistor,
- wherein the third conductor comprises a region configured to function as one of a source electrode and a drain electrode of the third transistor and a region configured to function as the other of the source electrode and the drain electrode of the second transistor,
- wherein the third conductor is electrically connected to the first conductor and one electrode of the capacitor,
- wherein the fourth conductor comprises a region configured to function as the other of the source electrode and the drain electrode of the third transistor,
- wherein a third insulator is provided over the oxide semiconductor,
- wherein a fifth conductor is provided over the third insulator,
- wherein the fifth conductor comprises a region configured to function as a first gate electrode of the third transistor,
- wherein a sixth conductor is provided over the oxide semiconductor,
- wherein the sixth conductor is configured to function as a first gate electrode of the second transistor,
- wherein a fourth insulator is provided over the fifth conductor, the sixth conductor, and the one electrode of the capacitor,
- wherein a seventh conductor is provided over the fourth insulator,
- wherein the seventh conductor comprises a region configured to function as the other electrode of the capacitor, and
- wherein the oxide semiconductor comprises indium, gallium, and zinc.
A semiconductor device comprising:
- a first transistor comprising silicon in a first channel formation region;
- a second transistor comprising a second channel formation region;
- a third transistor comprising a third channel formation region;
- a fourth transistor;
- and
- a capacitor,
- wherein a first insulator is provided over the first channel formation region of the first transistor,
- wherein a first conductor is provided over the first insulator,
- wherein the first conductor comprises a region configured to function as a first gate electrode of the first transistor,
- wherein a second insulator is provided over the first conductor,
- wherein an oxide semiconductor comprising the second channel formation region of the second transistor and the third channel formation region of the third transistor is provided over the second insulator,
- wherein a second conductor, a third conductor, and a fourth conductor are in contact with a top surface of the oxide semiconductor,
- wherein the second conductor comprises a region configured to function as one of a source electrode and a drain electrode of the second transistor,
- wherein the one of the source electrode and the drain electrode of the second transistor is electrically connected to one of a source electrode and a drain electrode of the first transistor,
- wherein the third conductor comprises a region configured to function as one of a source electrode and a drain electrode of the third transistor and a region configured to function as the other of the source electrode and the drain electrode of the second transistor,
- wherein the third conductor is electrically connected to the first conductor and one electrode of the capacitor,
- wherein the fourth conductor comprises a region configured to function as the other of the source electrode and the drain electrode of the third transistor,
- wherein a third insulator is provided over the oxide semiconductor,
- wherein a fifth conductor is provided over the third insulator,
- wherein the fifth conductor comprises a region configured to function as a first gate electrode of the third transistor,
- wherein a sixth conductor is provided over the oxide semiconductor,
- wherein the sixth conductor is configured to function as a first gate electrode of the second transistor,
- wherein a fourth insulator is provided over the fifth conductor, the sixth conductor, and the one electrode of the capacitor,
- wherein a seventh conductor is provided over the fourth insulator,
- wherein the seventh conductor comprises a region configured to function as the other electrode of the capacitor, and
- wherein one of a source electrode and a drain electrode of the fourth transistor is electrically connected to the other of the source electrode and the drain electrode of the first transistor.
Dependencies are inferred from the claim text.