Semiconductor devices and methods of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJung-Ho DO, Seungyoung LEE, Jonghoon JUNG, Jinyoung LIM, Giyoung YANG, Sanghoon BAEK, Taejoong SONG
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Abstract
A semiconductor device including: a conductor disposed on a substrate; a first contact disposed on the conductor; a second contact having a first portion disposed on the first contact and a second portion protruded away from the first portion in a direction parallel to the substrate, wherein the first and second contacts are disposed in an insulating layer; a via disposed on the insulating layer and the second portion of the second contact; and a metal line disposed on the via.
Claims14
A semiconductor device, comprising:
- a first active pattern protruding above a substrate, an upper portion of the first active pattern including a first channel region and a first source/drain region connected to the first channel region;
- a device isolation pattern on a sidewall of a lower portion of the first active pattern;
- a first gate electrode on the first channel region of the first active pattern;
- a first lower conductive structure electrically connected to the first source/drain region;
- a first conductive structure on the first lower conductive structure, the first conductive structure including a first portion and a second portion that are connected to each other to constitute a single body, the second portion extending from the first portion toward the first lower conductive structure and connected to the first lower conductive structure;
- an interconnection line on the first conductive structure;
- a barrier pattern;
- and
- a via between the interconnection line and the first portion, and connecting the interconnection line and the first conductive structure,
- wherein the first conductive structure further includes a third portion extending from the first portion toward the first gate electrode and connected to the first gate electrode,
- wherein a gap is formed between the third portion and the second portion, the gap being adjacent to the first portion and filled with an insulating layer that contacts a surface of the first portion,
- wherein the first conductive structure further includes a vertically-extended portion protruding from a bottom of the second portion and covering an upper sidewall of the first lower conductive structure,
- wherein the vertically-extended portion is spaced apart from the first gate electrode,
- wherein the barrier pattern comprises a first barrier portion between the second portion of the first conductive structure and the first lower conductive structure, a second barrier portion between the first gate electrode and the third portion of the first conductive structure, and a third barrier portion disposed on a sidewall of the vertically-extended portion of the first conductive structure,
- wherein the first barrier portion, the second barrier portion, and the third barrier portion of the barrier pattern are formed conformally and configured to cover the first portion, the second portion, the third portion, and the vertically-extended portion of the first conductive structure, and
- wherein a bottom surface of the vertically-extended portion of the first conductive structure is higher than a bottom surface of the third portion.
The semiconductor device of claim 4, wherein the first portion extends over and across the first and second gate electrodes.
A semiconductor device, comprising:
- a substrate;
- a first power interconnection line and a second power interconnection line;
- and
- a first standard cell between the first power interconnection line and the second power interconnection line,
- wherein the first standard cell comprises:
- a first fin-shaped structure including a first channel region and a first source/drain region connected to the first channel region;
- a device isolation pattern on a sidewall of a lower portion of the first fin-shaped structure;
- a first gate electrode on the first channel region of the first fin-shaped structure;
- a first lower conductive structure electrically connected to the first source/drain region;
- a first conductive structure on the first lower conductive structure, the first conductive structure including a first portion and a second portion that are connected to each other to constitute a single body, the second portion extending from the first portion toward the first lower conductive structure and connected to the first lower conductive structure;
- an interconnection line on the first conductive structure;
- a barrier pattern;
- and
- a via between the interconnection line and the first portion, and connecting the interconnection line and the first conductive structure,
- wherein the first conductive structure further includes a third portion extending from the first portion toward the first gate electrode and connected to the first gate electrode,
- wherein the first conductive structure further includes a vertically-extended portion protruding from a bottom of the second portion and covering an upper sidewall of the first lower conductive structure,
- wherein the barrier pattern comprises a first barrier portion between the second portion of the first conductive structure and the first lower conductive structure, a second barrier portion between the first gate electrode and the third portion of the first conductive structure, and a third barrier portion on a sidewall of the vertically-extended portion of the first conductive structure,
- wherein the vertically-extended portion is spaced apart from the first gate electrode,
- wherein the first barrier portion, the second barrier portion, and the third barrier portion of the barrier pattern are formed conformally and configured to cover the first portion, the second portion, the third portion, and the vertically-extended portion of the first conductive structure, and
- wherein a bottom surface of the vertically-extended portion of the first conductive structure is higher than a bottom surface of the third portion.
Dependencies are inferred from the claim text.