Electrical output stages suitable for high-voltage operation, and associated methods

A method of operating an electrical output stage that includes a first enhancement mode, metal oxide semiconductor field effect transistor (first MOSFET) and a second enhancement mode, metal oxide semiconductor field effect transistor (second MOSFET) electrically coupled in series between a power rail and an output node, and reverse bias circuitry coupled to a source of the second MOSFET, the method comprising:

• placing, by control circuitry, each of the first MOSFET and the second MOSFET into a respective off-state;
• enabling the reverse bias circuitry to bias the source of the second MOSFET such that a gate of the second MOSFET is reverse-biased with respect to the source of the second MOSFET while each of the first MOSFET and the second MOSFET is in its respective off-state;
• placing, by the control circuitry, each of the first MOSFET and the second MOSFET into a respective on-state;
• and
• disabling the reverse bias circuitry such that the reverse bias circuitry does not affect operation of the electrical output stage while each of the first MOSFET and the second MOSFET is in its respective on-state.

An electrical system comprising:

• an electrical output stage including a first enhancement mode, metal oxide semiconductor field effect transistor (first MOSFET) and a second enhancement mode, metal oxide semiconductor field effect transistor (second MOSFET) electrically coupled in series between a power rail and an output node;
• control circuitry configured to place each of the first MOSFET and the second MOSFET into a respective on-state and a respective off-state;
• reverse bias circuitry coupled to a source of the second MOSFET, the reverse bias circuitry being configured to:
• (i) in the off-state of the electrical output stage, bias the source of the second MOSFET such that a gate of the second MOSFET is reverse-biased with respect to the source of the second MOSFET, and
• (ii) in the on-state of the electrical output stage, operate in a disabled state such that the reverse bias circuitry does not affect operation of the electrical output stage;
• and
• signal receiving circuitry electrically coupled to the output node.