Integrated circuit and method of forming the same

A method of fabricating a flip-flop, the method comprising:

• forming a first set of transistors of a first type in a first row, the first row extending in a first direction, wherein the forming the first set of transistors comprises:
• forming a first active region in the first row, and extending in the first direction;
• forming a second set of transistors of a second type in a second row, the second row extending in the first direction and being separated from the first row in a second direction different from the first direction, the second type being different from the first type, wherein the first set of transistors and the second set of transistors include a first master latch circuit and a first slave latch circuit;
• and
• electrically coupling the first master latch circuit and the first slave latch circuit together;
• wherein the first master latch circuit includes a first reversed tri-state gate circuit coupled between a first node and a second node,
• the first slave latch circuit includes a second reversed tri-state gate circuit coupled between a third node and a fourth node,
• the first node and the second node are separated from each other by a first distance.

A method of fabricating a flip-flop, the method comprising:

• forming a first set of transistors of a first type in a first row, the first row extending in a first direction, wherein the forming the first set of transistors comprises:
• forming a first active region in the first row, and extending in the first direction;
• forming a second set of transistors of a second type in a second row, the second row extending in the first direction and being separated from the first row in a second direction different from the first direction, the second type being different from the first type, wherein the forming the second set of transistors comprises:
• forming a second active region in the second row, extending in the first direction, and being separated from the first active region in the second direction;
• and
• depositing a first conductive material over the first set of transistors and the second set of transistors thereby forming a set of conductors;
• wherein the first set of transistors and the second set of transistors include a first master latch circuit and a first slave latch circuit;
• the first master latch circuit includes a first reversed tri-state gate circuit coupled between a first node and a second node,
• the first slave latch circuit includes a second reversed tri-state gate circuit coupled between a third node and a fourth node,
• the first node and the second node are separated from each other by a first distance, and the third node and the fourth node are separated from each other by a second distance, and the first distance and the second distance is less than a first range.