Rf impedance matching network
AssigneeASM America, Inc.
InventorImran Ahmed Bhutta
Life of this patent
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Abstract
In one embodiment, a radio frequency (RF) impedance matching circuit is disclosed. A series electronically variable capacitor (EVC) is electrically coupled in series between an RF input and an RF output. The series EVC includes first fixed capacitors, each having a corresponding switch for switching in and out a corresponding one of the first fixed capacitors, each switch including one or more diodes. The RF impedance matching circuit further includes a first inductor having a first terminal electrically coupled to a common ground and a second terminal electrically coupled between the RF input and the RF output. The first inductor provides a DC biasing path to forward and reverse bias the switches of the series EVC.
Claims20
A radio frequency (RF) impedance matching circuit comprising:
- an RF input configured to operably couple to an RF source providing an RF signal;
- an RF output configured to operably couple to a load;
- a series electronically variable capacitor (EVC) electrically coupled in series between the RF input and the RF output, wherein the series EVC comprises first fixed capacitors, each of the first fixed capacitors having a corresponding switch for switching in and out the first fixed capacitor, each switch comprising one or more diodes;
- and
- a first inductor having a first terminal electrically coupled to a common ground and a second terminal electrically coupled between the RF input and the RF output;
- wherein the first inductor provides a DC biasing path to forward and reverse bias the switches of the series EVC.
A method of impedance matching comprising:
- coupling an impedance matching circuit between an RF source and a load, the impedance matching circuit comprising:
- an RF input configured to operably couple to the RF source, the RF source providing an RF signal;
- an RF output configured to operably couple to the load;
- a series electronically variable capacitor (EVC) electrically coupled in series between the RF input and the RF output, wherein the series EVC comprises first fixed capacitors, each of the first fixed capacitors having a corresponding switch for switching in and out the first fixed capacitor, each switch comprising one or more diodes;
- and
- a first inductor having a first terminal electrically coupled to a common ground and a second terminal electrically coupled between the RF input and the RF output;
- switching in or out at least one of the first fixed capacitors;
- and
- while switching in or out the at least one of the first fixed capacitors, providing, by the first inductor, a DC biasing path to forward and reverse bias the switches of the series EVC.
A semiconductor processing tool comprising:
- a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate;
- and
- an impedance matching circuit operably coupled to the plasma chamber, the matching circuit comprising:
- an RF input configured to operably couple to an RF source providing an RF signal;
- an RF output configured to operably couple to the plasma chamber;
- a series electronically variable capacitor (EVC) electrically coupled in series between the RF input and the RF output, wherein the series EVC comprises first fixed capacitors, each of the first fixed capacitors having a corresponding switch for switching in and out the first fixed capacitor, each switch comprising one or more diodes;
- and
- a first inductor having a first terminal electrically coupled to a common ground and a second terminal electrically coupled between the RF input and the RF output;
- wherein the first inductor provides a DC biasing path to forward and reverse bias the switches of the series EVC.
Dependencies are inferred from the claim text.