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US 2026/0311792 A1Published application
Multiple input signature register circuit with pass-gate exclusive or logic
AssigneeMicron Technology, Inc.
InventorsYong-jae LEE, Tyler J. GOMM
Life of this patent
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Abstract
In some implementations, an apparatus may include a built-in self-test circuit and a multiple input signature register (MISR) circuit. The built-in self-test circuit may be configured to implement a self-test of the apparatus and the MISR circuit may be configured to collect a set of results associated with the self-test. Additionally, the MISR circuit may include one or more pass-gate exclusive OR (XOR) logic gates.
Claims25
An apparatus, comprising:
- a built-in self-test circuit coupled to a multiple input signature register (MISR) circuit and configured to implement a self-test of the apparatus;
- and
- the MISR circuit comprising a pass-gate exclusive OR (XOR) logic gate and configured to collect a set of results associated with the self-test.
A method, comprising:
- initiating a built-in self-test of a memory device;
- and
- performing, using a plurality of logic gates comprising at least a pass-gate exclusive OR (XOR) logic gate, a multiple input signature register (MISR) calculation based at least in part on initiating the built-in self-test.
An apparatus, comprising:
- means for initiating a built-in self-test of a memory device;
- and
- means for performing, using a plurality of logic gates comprising at least a pass-gate exclusive OR (XOR) logic gate, a multiple input signature register (MISR) calculation based at least in part on initiating the built-in self-test.
Dependencies are inferred from the claim text.