Apparatus and operation method of flash memory
AssigneeSeoul National University R&Db Foundation
InventorsJihong KIM, Jaeyong LEE
Life of this patent
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AssigneeSeoul National University R&Db Foundation
InventorsJihong KIM, Jaeyong LEE
Estimating the term…
A flash memory device includes a memory cell array in which a plurality of memory cells are arranged, and a controller. The controller precharges a bitline and a wordline connected to the memory cell according to a first command, causes a target memory cell to perform a first operation, floats the bitline and the wordline for a threshold time, determines whether a second command is input within the threshold time, and controls whether to recharge or discharge the bitline and the wordline according to the second command. When the second command is input, the controller recharges the bitline and the wordline connected to the target memory cell, and when the second command is input after the threshold time has elapsed, the controller discharges the bitline and the wordline connected to the memory cell on which the second command is to be performed.
A flash memory device comprising:
A method of operating a flash memory device, the method comprising:
A flash memory device comprising:
A method of operating a flash memory device, the method comprising:
Dependencies are inferred from the claim text.