Shift register, gate driving circuit and display substrate with conductive lines between output transistor and capacitor structure

A display substrate, comprises a base substrate, wherein the base substrate comprises a display region and a peripheral region surrounding the display region, a plurality of pixel units are arranged in an array in the display region, and a shift register is arranged in the peripheral region,

• wherein the shift register comprises:
• a voltage control circuit coupled to an output control node and configured to control a voltage at the output control node;
• and
• at least two driving output circuits, each comprising:
• an output transistor and a capacitor structure which are arranged along a first direction, wherein the output transistor and the capacitor structure are coupled to each other through a first conductive line extending along a second direction, and the first conductive line is coupled to a signal output line configured for the driving output circuit, the at least two driving output circuits comprises a first driving output circuit and a second driving output circuit;
• the output transistor in the first driving output circuit, the capacitor structure in the first driving output circuit, the capacitor structure in the second driving output circuit, and the output transistor in the second driving output circuit are sequentially arranged along the first direction;
• a first voltage writing electrode of the capacitor structure in the first driving output circuit and a first voltage writing electrode of the capacitor structure in the second driving output circuit are coupled to each other through a conductive structure between the capacitor structure in the first driving output circuit and the capacitor structure in the second driving output circuit;
• the output control node is arranged on the conductive structure;
• and the signal output line of the first driving output circuit and the signal output line of the second driving output circuit provide corresponding driving signals for two different gate lines in the display region, respectively;
• the output transistor comprises a gate electrode, a first electrode and a second electrode, the gate electrode of the output transistor is coupled to the output control node and a first voltage writing electrode of the capacitor structure, the first electrode of the output transistor is coupled to a clock signal line configured for the driving output circuit, and the second electrode of the output transistor is coupled to the first conductive line;
• and
• a second conductive line is provided between the first conductive line and the capacitor structure, and the first conductive line is coupled to a second voltage writing electrode of the capacitor structure through the second conductive line.